RTL Coding, Simulation.

Test bench development.

Verification IP development.

Understanding product requirements and specifications.

Developing Micro Architecture Document and HLD

Automation at both module and system level to reduce manual effort.

Mixed-mode verification using C/C++, Verilog/VHDL, assembly and assertions

System verilog, UVM Methodologies.

Help in understanding and RTL Implementation of DFT.